A 15% BOM cost reduction on production power electronics hardware is achievable without changing the fundamental architecture or compromising reliability — but it requires a systematic, data-driven approach across four distinct areas. This article outlines the process used on a 240kW DCFC programme to hit that target.
1. Alternate Sourcing
The first pass is always alternate sourcing: finding second and third sources for components that are currently sole-sourced or designed around a single manufacturer's part number.
For power semiconductors (MOSFETs, diodes, IGBTs), the key parameters are drain-source breakdown voltage, on-resistance (or saturation voltage), gate charge, and thermal resistance. Any device that meets or exceeds these parameters from an approved manufacturer can serve as an alternate. The qualification process involves characterisation testing at temperature extremes and a short reliability soak.
For passives (capacitors, inductors, resistors), the qualification bar is lower. Film capacitors are fungible within the same capacitance, voltage, and temperature rating classes. Ceramic capacitors require more care — X5R and X7R dielectric from different manufacturers can have significantly different DC bias derating curves.
Typical savings from alternate sourcing: 8–12% on semiconductor line items, 5–8% on passives.
2. Component Consolidation
The second pass identifies opportunities to consolidate the component library — using a single higher-rated component in multiple positions where previously different parts were specified.
An example from the DCFC programme: three different gate resistor values (4.7Ω, 10Ω, 22Ω) were used across the design. Analysis showed that 10Ω worked in all three positions with acceptable switching speed trade-offs. Consolidating to a single value reduced SKU count and enabled volume pricing.
Capacitor voltage ratings are another consolidation target. If the design uses 450V and 500V rated capacitors for different positions, standardising on 500V eliminates an SKU at minimal cost delta per component.
3. DFM Optimisation
Design-for-manufacture (DFM) improvements reduce assembly cost, which is a significant component of total COGS for power electronics.
Through-hole components (PTH) cost significantly more to assemble than surface-mount (SMT) components because they require either wave soldering or selective soldering, both slower than reflow. Reviewing all PTH components and converting to SMT equivalents where the package exists reduces assembly cost.
PCB panel utilisation is another DFM lever. If the bare board panel has unused area, smaller sub-assemblies or test coupons can be panelled together, amortising the per-panel setup cost across more functional area.
4. Reliability Guardrails
Cost reduction without a reliability gate is a false economy. Every change — alternate source, component consolidation, or DFM modification — must pass through an engineering review that checks:
- Derating compliance (voltage, current, temperature ratings maintained)
- Thermal re-analysis if the package changes
- FMEA update for any new failure modes introduced
- Accelerated life test data from the alternate supplier where available
On the DCFC programme, every alternate source component went through 500-hour thermal cycling before production approval. No shortcuts were taken on the reliability gate — and the final product passed all certification testing first time.
Result
Systematic application of these four approaches across the full BOM delivered exactly 15% cost reduction. The largest contributors were alternate sourcing (9%) and component consolidation (4%), with DFM improvements contributing the remaining 2%.